10AX057K2F40I2SG [INTEL]

Name: 10AX057K2F40I2SG
Brand: INTEL
SKU: 10AX057K2F40I2SG
Availability: InStock

Part No:

10AX057K2F40I2SG

Programmable Logic ICs

Manufacturer:

INTEL

Description:

The Intel® Arria® 10 device family consists of high-performance and power-efficient 20 nm mid-range FPGAs and SoCs.

Datasheet:

Stock Status:

Available for RFQ

Pricing:

Request Volume Pricing

Quote Response:

Within 24 Hours

Shipping:

In-stock parts ship in 1–2 business days

Specification

Type

Parameter

Core Voltage

0.82V

Package

1.0 mm ball-pitch Fineline BGA, 0.8 mm ball-pitch Ultra Fineline BGA

Dsp Blocks

variable-precision DSP blocks

Fabric Clock Max

800MHz

Intel Arria 10 GT Backplane

up to 12.5 Gbps

Intel Arria 10 GT Transceiver Speed Max

25.8 Gbps

Intel Arria 10 GT Transceiver Speed Min

1 Gbps

Intel Arria 10 GX Backplane

up to 12.5 Gbps

Intel Arria 10 GX Transceiver Speed Max

17.4 Gbps

Intel Arria 10 GX Transceiver Speed Min

1 Gbps

Intel Arria 10 SX Backplane

up to 12.5 Gbps

Intel Arria 10 SX HPS Processor

Dual-core ARM Cortex-A9 MPCore processor

Intel Arria 10 SX HPS Speed

1.2GHz (1.5GHz overdrive)

Intel Arria 10 SX Transceiver Speed Max

17.4 Gbps

Intel Arria 10 SX Transceiver Speed Min

1 Gbps

Lvds Speed

1.6 Gbps

Memory Block

M20K (20-Kb) and MLAB (640-bit)

Memory Controller

DDR4, DDR3, DDR3L

Pcie Hard Ip

Gen1, Gen2, Gen3

Technology

TSMC's 20-nm SoC process technology

Products Detail

Intel Arria 10 device family delivers higher performance than the previous generation of mid-range and high-end FPGAs and power efficiency through a comprehensive set of power-saving technologies. Built on TSMC's 20 nm process technology, the devices feature enhanced 8-input adaptive logic modules (ALM), up to 65.6 Mb of embedded memory, variable-precision DSP blocks, fractional synthesis PLLs, hard PCI Express Gen3 IP blocks, and hard memory controllers and PHY up to 2,400 Mbps. The SoC variants integrate a dual-core ARM Cortex-A9 MPCore processor with hard IP and FPGA fabric in a single system-on-a-chip. Transceivers support up to 25.8 Gbps for short reach applications and 12.5 Gbps for backplane capability.

Key Features

Enhanced core architecture: Built on TSMC's 20 nm process technology, 60% higher performance than previous generation mid-range FPGAs, 15% higher performance than previous generation high-end FPGAs
High-bandwidth integrated transceivers: Short-reach rates up to 25.8 Gbps, Backplane capability up to 12.5 Gbps, Integrated 10GBASE-KR and 40GBASE-KR4 Forward Error Correction (FEC)
Improved logic integration and hard IP blocks: 8-input adaptive logic module (ALM), Up to 65.6 Mb embedded memory, Variable-precision DSP blocks, Fractional synthesis PLLs, Hard PCI Express Gen3 IP blocks, Hard memory controllers and PHY up to 2,400 Mbps
Second generation hard processor system (HPS) with integrated ARM Cortex-A9 MPCore processor: Tight integration of dual-core ARM Cortex-A9 MPCore processor, hard IP, and FPGA in a single SoC, Supports over 128 Gbps peak bandwidth
Advanced power savings: Comprehensive set of advanced power saving features, Power-optimized MultiTrack routing and core architecture, Up to 40% lower power compared to previous generation mid-range FPGAs, Up to 60% lower power compared to previous generation high-end FPGAs
Technology: TSMC's 20-nm SoC process technology, Allows operation at a lower VCC level of 0.82 V
Packaging: 1.0 mm ball-pitch Fineline BGA, 0.8 mm ball-pitch Ultra Fineline BGA, Multiple devices with identical package footprints for seamless migration
High-performance FPGA fabric: Enhanced 8-input ALM with four registers, Improved multi-track routing architecture, Hierarchical core clocking architecture, Fine-grained partial reconfiguration
Internal memory blocks: M20K—20-Kb memory blocks with hard ECC, Memory logic array block (MLAB)—640-bit memory
Variable-precision DSP blocks: Native support for signal processing precision levels from 18 x 19 to 54 x 54, Native support for 27 x 27 multiplier mode, 64-bit accumulator and cascade for systolic FIRs, Internal coefficient memory banks, Preadder/subtractor, Additional pipeline register, Supports floating point arithmetic
Memory controller: DDR4, DDR3, and DDR3L
PCI Express: Gen1, Gen2, Gen3 hard IP
Transceiver I/O: 10GBASE-KR/40GBASE-KR4 FEC, PCS hard IPs for 10GbE, PCIe PIPE, Interlaken, GbE, CPRI, GPON, JESD204b, 8B/10B, 64B/66B, 64B/67B encoders/decoders, Custom mode
Core clock networks: Up to 800 MHz fabric clocking, Global, regional, and peripheral clock networks, Clock gating for power reduction
Phase-locked loops (PLLs): High-resolution fractional synthesis PLLs, Integer PLLs
FPGA General-purpose I/Os: 1.6 Gbps LVDS, On-chip termination, 1.2 V to 3.0 V single-ended LVTTL/LVCMOS
External Memory Interface: Hard memory controller for DDR4, DDR3, DDR3L, Soft memory controller for RLDRAM 3, QDR IV, QDR II+
Low-power serial transceivers: Continuous operating range 1 Gbps to 25.8 Gbps, Backplane support up to 12.5 Gbps, Extended range down to 125 Mbps, ATX transmit PLLs with fractional synthesis, Electronic Dispersion Compensation, Adaptive equalization, Transmitter pre-emphasis and de-emphasis, Dynamic partial reconfiguration
HPS (Intel Arria 10 SX devices only): Dual-core ARM Cortex-A9 MPCore processor up to 1.5 GHz, 256 KB on-chip RAM, 64 KB on-chip ROM, System peripherals, Security features, ARM CoreSight JTAG debug
External interfaces: Hard memory interface, QSPI, NAND, DMA, SD/MMC, Ethernet, USB OTG, I2C, UART, SPI, HPS GPIO
Interconnects to core: High-performance ARM AMBA AXI bus bridges, HPS–FPGA bridges, Configuration bridge, FPGA-to-HPS SDRAM controller bridge
Configuration: Tamper protection, Enhanced 256-bit AES design security, Configuration via protocol (CvP), Dynamic reconfiguration, Fine-grained partial reconfiguration, Active Serial x4 Interface
Power management: SmartVID, Low static power device options, Programmable Power Technology, Intel Quartus Prime integrated power analysis
Software and tools: Intel Quartus Prime design suite, Transceiver toolkit, Platform Designer, DSP Builder, OpenCL, Intel SoC FPGA Embedded Design Suite

Application scenarios

Channel and switch cards in remote radio heads
Mobile backhaul
40G/100G muxponders and transponders
100G line cards
Bridging
Aggregation
Studio switches
Servers and transport
Videoconferencing
Professional audio and video
Flash cache
Cloud computing servers
Server acceleration
Diagnostic scanners
Diagnostic imaging
Missile guidance and control
Radar
Electronic warfare
Secure communications

Documents

Datasheets:

Arria 10 Device Overview Arria 10 Device Datasheet

PCN Packaging:

All Dev Pkg Chg 1/Aug/2018

Product FAQ

1. Is 10AX057K2F40I2SG available for RFQ?

Yes. 10AX057K2F40I2SG by INTEL is available for RFQ. Submit your required quantity and our team will confirm real-time stock, lead time, and volume pricing.

2. Why is there no fixed price for 10AX057K2F40I2SG?

Pricing for 10AX057K2F40I2SG can vary by order quantity, market availability, date code, packaging, and delivery destination. Request a quote to receive the latest volume pricing.

3. What are the key specifications of 10AX057K2F40I2SG?

10AX057K2F40I2SG is a INTEL Programmable Logic ICs with Intel Arria 10 GT Transceiver Speed Max: 25.8 Gbps and Intel Arria 10 GT Transceiver Speed Min: 1 Gbps. Review the product details or submit an RFQ if you need confirmation before purchase.

4. How fast can I get a quote for 10AX057K2F40I2SG?

Our sales team usually responds within 24 hours after receiving your RFQ. The quote may include stock status, unit price, lead time, shipping options, and available alternatives.

5. How soon can 10AX057K2F40I2SG be shipped?

If stock is confirmed, in-stock parts can usually ship within 1–2 business days. Final lead time depends on quantity, stock source, and delivery destination.

6. Can you suggest alternatives to 10AX057K2F40I2SG?

Yes. If 10AX057K2F40I2SG is unavailable, obsolete, or does not meet your required lead time, we can help check similar INTEL Programmable Logic ICs parts or compatible alternatives.

RFQ

Part Number:

10AX057K2F40I2SG

Manufacturer:

INTEL

Looking for Pricing? Contact us for volume pricing.

Shipping & Warranty

Fast Dispatch: Ships in 5-7 days(in-stock parts within 1-2 days)

Unishop Global Export: 1-7 days, $40.00

Guaranteed Delivery: Door-to-door in 30 days

Compliant Worldwide Shipping: DHL, FedEx, SF, and UPS.

Feature

30-Day Guarantee
Fasted Delivery
Hassle-Free Returns
Secure payment method

IMPORTANT NOTICE

Quotations are subject to stock availability and may vary with market conditions. Prices and lead times are not guaranteed until a purchase order is confirmed. Ensure your contact details are correct to avoid delays in response.

Enhanced core architecture: Built on TSMC's 20 nm process technology, 60% higher performance than previous generation mid-range FPGAs, 15% higher performance than previous generation high-end FPGAs
High-bandwidth integrated transceivers: Short-reach rates up to 25.8 Gbps, Backplane capability up to 12.5 Gbps, Integrated 10GBASE-KR and 40GBASE-KR4 Forward Error Correction (FEC)
Improved logic integration and hard IP blocks: 8-input adaptive logic module (ALM), Up to 65.6 Mb embedded memory, Variable-precision DSP blocks, Fractional synthesis PLLs, Hard PCI Express Gen3 IP blocks, Hard memory controllers and PHY up to 2,400 Mbps
Second generation hard processor system (HPS) with integrated ARM Cortex-A9 MPCore processor: Tight integration of dual-core ARM Cortex-A9 MPCore processor, hard IP, and FPGA in a single SoC, Supports over 128 Gbps peak bandwidth
Advanced power savings: Comprehensive set of advanced power saving features, Power-optimized MultiTrack routing and core architecture, Up to 40% lower power compared to previous generation mid-range FPGAs, Up to 60% lower power compared to previous generation high-end FPGAs
Technology: TSMC's 20-nm SoC process technology, Allows operation at a lower VCC level of 0.82 V
Packaging: 1.0 mm ball-pitch Fineline BGA, 0.8 mm ball-pitch Ultra Fineline BGA, Multiple devices with identical package footprints for seamless migration
High-performance FPGA fabric: Enhanced 8-input ALM with four registers, Improved multi-track routing architecture, Hierarchical core clocking architecture, Fine-grained partial reconfiguration
Internal memory blocks: M20K—20-Kb memory blocks with hard ECC, Memory logic array block (MLAB)—640-bit memory
Variable-precision DSP blocks: Native support for signal processing precision levels from 18 x 19 to 54 x 54, Native support for 27 x 27 multiplier mode, 64-bit accumulator and cascade for systolic FIRs, Internal coefficient memory banks, Preadder/subtractor, Additional pipeline register, Supports floating point arithmetic
Memory controller: DDR4, DDR3, and DDR3L
PCI Express: Gen1, Gen2, Gen3 hard IP
Transceiver I/O: 10GBASE-KR/40GBASE-KR4 FEC, PCS hard IPs for 10GbE, PCIe PIPE, Interlaken, GbE, CPRI, GPON, JESD204b, 8B/10B, 64B/66B, 64B/67B encoders/decoders, Custom mode
Core clock networks: Up to 800 MHz fabric clocking, Global, regional, and peripheral clock networks, Clock gating for power reduction
Phase-locked loops (PLLs): High-resolution fractional synthesis PLLs, Integer PLLs
FPGA General-purpose I/Os: 1.6 Gbps LVDS, On-chip termination, 1.2 V to 3.0 V single-ended LVTTL/LVCMOS
External Memory Interface: Hard memory controller for DDR4, DDR3, DDR3L, Soft memory controller for RLDRAM 3, QDR IV, QDR II+
Low-power serial transceivers: Continuous operating range 1 Gbps to 25.8 Gbps, Backplane support up to 12.5 Gbps, Extended range down to 125 Mbps, ATX transmit PLLs with fractional synthesis, Electronic Dispersion Compensation, Adaptive equalization, Transmitter pre-emphasis and de-emphasis, Dynamic partial reconfiguration
HPS (Intel Arria 10 SX devices only): Dual-core ARM Cortex-A9 MPCore processor up to 1.5 GHz, 256 KB on-chip RAM, 64 KB on-chip ROM, System peripherals, Security features, ARM CoreSight JTAG debug
External interfaces: Hard memory interface, QSPI, NAND, DMA, SD/MMC, Ethernet, USB OTG, I2C, UART, SPI, HPS GPIO
Interconnects to core: High-performance ARM AMBA AXI bus bridges, HPS–FPGA bridges, Configuration bridge, FPGA-to-HPS SDRAM controller bridge
Configuration: Tamper protection, Enhanced 256-bit AES design security, Configuration via protocol (CvP), Dynamic reconfiguration, Fine-grained partial reconfiguration, Active Serial x4 Interface
Power management: SmartVID, Low static power device options, Programmable Power Technology, Intel Quartus Prime integrated power analysis
Software and tools: Intel Quartus Prime design suite, Transceiver toolkit, Platform Designer, DSP Builder, OpenCL, Intel SoC FPGA Embedded Design Suite