EPM7032QC44-10 [Altera]

The MAX 7000 family, based on Altera's second-generation MAX architecture, provides programmable logic solutions with densities from 600 to 5,000 usable gates. It includes 5.0-V MAX 7000 and 5.0-V ISP-based MAX 7000S devices, with in-system programmability via JTAG. The devices offer fast performance with 5-ns pin-to-pin delays and up to 175.4-MHz counter frequencies. Features include programmable macrocell flip-flops, power-saving mode (over 50% reduction per macrocell), configurable expander product terms (up to 32 per macrocell), and a range of packages (44 to 208 pins). The family supports 3.3-V or 5.0-V operation with MultiVolt I/O interface (except 44-pin packages) and is pin-compatible with MAX 7000A and MAX 7000B devices. Enhanced features in MAX7000E and MAX7000S include additional global clocking, output enables, enhanced interconnect, fast input registers, and programmable slew-rate control. Software support includes Altera's development systems and interfaces to industry-standard EDA tools.