EPM7064LC84-12 [INTEL]

The MAX 7000 family of high-density, high-performance PLDs is based on Altera's second-generation MAX architecture. Fabricated with advanced CMOS technology, the EEPROM-based MAX7000 family provides 600 to 5,000 usable gates, in-system programmability (ISP), pin-to-pin delays as fast as 5 ns, and counter speeds of up to 175.4 MHz. The devices feature programmable macrocell flipflops with independent controls, power-saving modes, configurable expander product-terms, and are available in packages ranging from 44 to 208 pins. They support 3.3-V or 5.0-V operation with MultiVolt I/O interface and include enhanced features in MAX7000E and MAX7000S devices.