EPM7064STC44-6N [Altera]

High-performance, EEPROM-based programmable logic devices (PLDs) based on second-generation MAX architecture. Includes 5.0-V MAX 7000 devices and 5.0-V ISP-based MAX 7000S devices. Logic densities from 600 to 5,000 usable gates. Pin-to-pin logic delays as low as 5 ns and counter frequencies up to 175.4 MHz. Available in various packages including PLCC, PGA, PQFP, RQFP, and TQFP. Features programmable power-saving mode, security bit, and MultiVolt I/O interface (3.3-V or 5.0-V operation). Enhanced features in MAX7000E and MAX7000S devices include additional global clocking, output enable controls, and fast input registers.