EPM7128BFC256-7 [Altera]

The MAX 7000B family is a high-density, high-performance PLD family based on Altera's second-generation MAX architecture. These EEPROM-based devices operate at 2.5V and offer 600 to 10,000 usable gates, in-system programmability (ISP) via JTAG, and pin-to-pin delays as fast as 3.5 ns. Key features include MultiVolt I/O interface (supporting 3.3V, 2.5V, and 1.8V logic levels), programmable power-saving mode, support for advanced I/O standards (SSTL-2, SSTL-3, GTL+), PCI compatibility, bus-hold, open-drain output, programmable security bit, boundary-scan test (IEEE 1149.1), and hot-socketing operation. The architecture includes programmable interconnect array (PIA), configurable expander product terms, programmable macrocell registers, and two global clocks. Packages include PLCC, TQFP, PQFP, BGA, FineLine BGA, and Ultra FineLine BGA.