AT80C52X2DBS-SLSUM [Microchip]

The TS80C52X2 retains all features of the 80C51 with extended ROM/EPROM capacity (8 Kbytes), 256 bytes of internal RAM, a 6-source, 4-level interrupt system, an on-chip oscillator and three timer/counters. It features a dual data pointer, a versatile serial channel (EUART) for multiprocessor communication, and an X2 speed improvement mechanism. The fully static design reduces power consumption by lowering clock frequency without data loss. It includes software-selectable Idle and Power-down modes for further power savings.