The ARM®-based SAM920T runs up to 180 MHz and embeds Full Speed USB host and device interfaces, a 10/100 Ethernet MAC, as well as standard peripherals such as a Multimedia Card Interface (MCI), I2S, USARTs, master/slave SPIs, 16-bit Timers and a TWI (Two-Wire Interface). The external bus interface features controllers for SDRAM and static memories including NAND flash and CompactFlash. The RM9200 is available in 256-ball LFBGA and 208-pin QFP packages.

Please consider using our newest SAM9 series such as the SAM9X60 or SAM9X7, which provides more advanced features and enhanced performance.

• ARM920T ARM Thumb Processor running up to 180 MHz
• 16-Kbyte Data Cache, 16-Kbyte Instruction Cache
• Memory Management Unit
• Embedded Trace Module (256 LFBGA Package only)
• 16 Kbytes of SRAM, single-cycle access
• 128 Kbytes of ROM embedding standard bootstrap
• 32-bit External Bus Interface (EBI) supporting SDRAM, Static Memory, Burst Flash, Glueless Connection to CompactFlash® and NAND Flash/SmartMedia®
• Enhanced Clock Generator and Power Management Controller
• Two On-chip Oscillators with Two PLLs
• Very Slow Clock Operating Mode and Software Power Optimization Capabilities
• Four Programmable External Clock Signals
• System Timer Including Periodic Interrupt, Watchdog and Second Counter
• Real-time Clock with Alarm Interrupt
• Debug Unit, Two-wire UART and Support for Debug Communication Channel
• Advanced Interrupt Controller with 8-level Priority, Individually Maskable Vectored Interrupt Sources, SpuriousInterrupt Protected
• Seven External Interrupt Sources and One Fast Interrupt Source
• Four 32-bit PIO Controllers with Up to 122 Programmable I/O Lines, Input Change Interrupt and Open-drain Capability on Each Line
• 20-channel Peripheral DMA Controller (PDC)
• Media Independent Interface (MII) or Reduced Media Independent Interface (RMII)
• Integrated 28-byte FIFOs and Dedicated DMA Channels for Receive and Transmit
• Dual On-chip Transceivers (Single Port Only on 208-lead PQFP Package)
• Integrated FIFOs and Dedicated DMA Channels
• On-chip Transceiver, 2-Kbyte Configurable Integrated FIFOs
• Automatic Protocol Control and Fast Automatic Data Transfers
• MMC and SD Memory Card-compliant, Supports Up to Two SD Memory Cards
• Independent Clock and Frame Sync Signals for Each Receiver and Transmitter
• I2S Analog Interface Support, Time Division Multiplex Support
• High-speed Continuous Data Stream Capabilities with 32-bit Data Transfer
• Support for ISO7816 T0/T1 Smart Card
• Hardware Handshaking
• RS485 Support, IrDA® Up To 115 Kbps
• Full Modem Control Lines on USART1
• 8- to 16-bit Programmable Data Length
• 4 External Peripheral Chip Selects
• Three External Clock Inputs
• Two Multi-purpose I/O Pins per Channel
• Double PWM Generation, Capture/Waveform Mode, Up/Down Capability
• Master Mode Support, All 2-wire Microchip EEPROMs Supported
• IEEE® 1149.1 JTAG Boundary Scan on All Digital Pins
• 1.65V to 1.95V for VDDCORE, VDDOSC and VDDPLL
• 3.0V to 3.6V for VDDIOP (Peripheral I/Os) and for VDDIOM (Memory I/Os)
• Low Power: On VDDCORE 24.4 mA in Normal Mode, 520 μA in Standby Mode
• 208-pin Green PQFP
• 256-ball RoHS-compliant LFBGA