Name: KSZ8842-PMQL
Brand: Microchip
SKU: KSZ8842-PMQL

The KSZ8842-series of 2-port switches includes PCI and non-PCI CPU interfaces.

The datasheet describes the KSZ8842-PMQL/PMBL PCI CPU interface chips. KSZ8842-PMQL is PQFP package chip, KSZ8842-PMBL is LFBGA package chip. For information on the KSZ8842-MQL/MBL CPU non-PCI interface switches, refer to the KSZ8842-MQL/MBL datasheet.

The KSZ8842-PMQL/PMBL is the industry's first fully managed 2-port switch with a 32-bit/33MHz PCI processor interface. It is a proven, 4th generation, integrated Layer 2 switch that is compliant with the IEEE 802.3u standard. An industrial temperature grade version of the KSZ8842-PMQL/PMBL, also can be ordered the KSZ8842-PMQLI/PMBL AM. The KSZ8842-PMQL/PMBL can be configured as a switch or as a low-latency (<310 nanoseconds) repeater in latency-critical, embedded or industrial Ethernet applications.

For industrial automation applications, the KSZ8842-PMQL/PMBL can run in half-duplex mode regardless of the application. The KSZ8842-PMQL/PMBL offers an extensive feature set that includes tag/port-based VLAN, quality of service (QoS) priority management, management information base (MIB) counters, and CPU control/data interfaces to effectively address Fast Ethernet applications. The KSZ8842-PMQL/PMBL contains two 10/100 transceivers with patented, mixed-signal, low-power technology three media access control (MAC) units, a direct memory access (DMA) channel, a high-speed, non-blocking, switch fabric, a dedicated 1K entry forwarding table, and an on-chip frame buffer memory.

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Non-blocking switch fabric assures fast packet delivery by utilizing a 1K entry MAC Address look-up engine and a store-and-forward architecture

Fully compliant with IEEE 802.3u standards

Full-duplex IEEE 802.3x flow control (Pause) with force mode option

Half-duplex back pressure flow control

IEEE 802.1Q VLAN support for up to 16 groups (full-range of VLAN IDs)

VLAN ID tag/untag options, per port basis

IEEE 802.1p/Q tag insertion or removal on a per-port basis (egress)

Programmable rate limiting at the ingress and egress port

Broadcast storm protection

IEEE 802.1d spanning tree protocol support

MAC filtering function to filter unicast packets

Unknown MAC address forwarding function

Direct forwarding mode enabling the processor to identify the ingress port and to specify the egress port

IGMP v1/v2 snooping support for multicast packet filtering

IPV6 Multicast Listener Discovery (MLD) snooping support

Management information base (MIB) counters for fully compliant statistics gathering: 32 MIB counters per port

Loop back modes for remote failure diagnostics

The PCI configuration registers are used to initialize and configure the PCI interface
The PCI control/status registers are used to communicate between the host and KSZ8842-PMQL/PMBL
Switch registers are used to support transceiver control and status. They are configurable on-the-fly (port-priority, 802.1p/d/Q, etc.)
Per port, 802.1p and DiffServ based
Re-mapping of 802.1p priority field on a per port basis
Full-chip hardware power-down (register configuration not saved) provides for low power dissipation
Per port-based software power-save on PHY (idle link detection, register configuration preserved)
Single power supply: 3.3V
Commercial Temperature Range: 0°C to +70°C
Industrial Temperature Range: -40°C to +85°C
Available in 128-pin PQFP and 100-ball LFBGA