SAM9X72-I/4PB [Microchip]

The SAM9X72 is a high-performance, ultra-low-power ARM926EJ-S CPU-based embedded microprocessor (MPU) running up to 800 MHz. The SAM9X72 supports various NVM interfaces, including NAND Flash, Quad SPI and eMMC Flash. This device supports parallel port Camera as well as LVDS display interfaces. The device integrates powerful peripherals for connectivity and user interface applications. It offers State-of-the-Art security functions such as Secure Boot capability with on-chip secure key storage (OTP), high-performance crypto accelerators (SHA, AES and TDES) , tamper pins and PUF.

Microchip offers for different supply configurations, fully tested power management solutions respecting the SAM9X72 power sequencing specifications that are referenced in the product specification.

Low System Cost and High Value Integration:
• 800MHz ARM926EJ-S Core, 266MHz System/Memory Bus

Memories:
• 32 kB Data Cache and 32kB Instruction Cache
• 64 kB internal SRAM
• 16-bit DDR databus

Enhanced User Interface capability:
• 24-bit LCD Controller with overlays up to 1024x768 resolution
• 2D Graphics Engine
• LVDS Display Interface
• RGB 24-bit display interface

Built-in Class D Amplifier

Camera Support
• Parallel Port
• RGB 24bit display interface
• 12-bit Parallel Camera Interface

Large number of connectivity options:
• Single 10/100/1G Ethernet
• One Quad/Octal SPI controller
• Thirteen FLEXCOMs(USART,SPI and TWI/I2C)

State-of-the-Art Security:
• Hardware Encryption Engine (TDES, AES and SHA), True Random Generator (TRNG), PUF
• Secure Boot with on-chip Secure Key Storage (OTP)
• Physical protection against tamper, 8 tamper detection pins
• On the Fly scrambling / unscrambling for memories

Rich Development Ecosystem:
• Free mainline Linux® Distribution
• MPLAB® X Integrated Development Environment and MPLAB® Harmony v3
• Multiple Third-party Software and Hardware Solutions

Optimized for Easy PCB Design and Low EMI
• TFBGA240, 11x11, 0.65 mm pitch - de-populated ball-out
• TFBGA256, 9x9, 0.5 mm pitch - de-populated ball-out
• Power/GND balls placed and distributed for optimal decoupling
• Fractional System PLL, I/Os slew rate and drive control, DDR I/Os calibration for Low EMI