USB7050PT/KDX [Microchip]

The Microchip USB7050P SmartHub™ IC is a low-power, OEM configurable, USB 3.2 Gen 1 hub controller with 4 downstream ports and advanced features for embedded USB applications. The USB7050P is fully compliant with the Universal Serial Bus Revision 3.2 Specification and USB 2.0 Link Power Management Addendum supporting 5 Gbps Super-Speed (SS), 480 Mbps Hi-Speed (HS), 12 Mbps Full-Speed (FS), and 1.5 Mbps Low-Speed (LS) USB downstream devices on all enabled downstream ports.

The USB7050P has been configured to support 3rd party USB Power Delivery with up to 100W of power on the upstream and two of the downstream USB Type-C ports. All the USB7050P USB Type-C ports include internal USB 3.2 Gen 1 multiplexers; no external multiplexer is required for Type-C support. The USB7050P is USB-IF certified as a USB3.2 Gen1 hub (TID).

Targeted for PD (Power Delivery) application, the USB7050P provides the developer control access to the internal USB Type-C™ MUXes.

A SmartHub IC is defined as a USB hub that integrates system levels functions typically associated with a separate MCU or processor. Like the rest of the USB70xx family, the USB7050P SmartHub IC enables communication to other peripherals in addition to USB. Called "I/O Bridging," this capability allows the host to seamlessly interface to peripherals via I2C, SPI or GPIOs over USB. The USB7050P can also enable a downstream device to take control of the USB downstream ports by swapping roles and becoming the host port of the Hub. The USB7050P can also switch between two different hosts if required. This role changing technology, called FlexConnect, can be initiated through hardware or software commands.

The USB7050P also supports legacy USB speeds (HS/FS/LS) through a dedicated USB 2.0 hub controller that is the culmination of six generations of Microchip hub feature controller design and experience with proven reliability, interoperability, and device compatibility. The SuperSpeed hub controller operates in parallel with the USB 2.0 controller, decoupling the 5 Gbps SS data transfers from bottlenecks due to the slower USB 2.0 traffic.

The USB7050P supports downstream battery charging and integrated battery charger detection circuitry supporting the USB-IF Battery Charging (BC1.2) detection method and most Apple^® devices. The USB7050P provides the battery charging handshake and supports the following USB-IF BC1.2 charging profiles: 

• DCP: Dedicated Charging Port (Power brick with no data)
• CDP: Charging Downstream Port (1.5A with data)
• SDP: Standard Downstream Port (0.5A with data) 
• Custom profiles loaded via SPI EEPROM or OTP

MPLAB^® Connect Configurator, Microchip’s proprietary software utility, can be used to program On-chip One Time Programmable (OTP) ROM for the USB7050P which stores required register settings to ensure the desired start up configuration at power on. All LED, GPIOs and port control signal pins are under firmware control, allowing for maximum operational flexibility. However, for even more simplicity, the USB7050P can be configured through a series of external low-cost resistor bootstraps. A handful of bootstrap pins are available to enable standard configurations for GPIOs and downstream ports. No OTP programming required.

The USB7050P is also AEC-Q100 certified support traditional data transfer applications that require higher data rates than USB2.0 as well as Multi-Host applications like CarPlay and CarLife that enable the graphical user interface of a phone to be displayed on a vehicle's screen within a car. 

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