
TMS320F28035PAGS
Texas Instruments

The quad port VSC8575 GbE PHY with VeriTime™ is ideal for securing cloud network applications including e-commerce, databases, collaboration, smart grid, video, and enterprise or government communications.
VeriTime™ is Microchip’s patent-pending timing technology that delivers the industry's most accurate IEEE 1588v2 timing implementation available on the market today (±4 ns accuracy, 1 ns precision, 1000BASE-T).
VSC8575 supports Y.1731 OAM and MPLS-TP OAM for accurate delay measurement and performance monitoring. In addition, it includes dual recovered clock outputs for timing references in Synchronous Ethernet solutions. Using Microchip's Ring Resiliency™ technology, the PHY switches between master and slave timing without interrupting the 1000BASE-T link.
The device includes a simplified hardware and software migration path for designs already using VSC8574, VSC8572, VSC8504, or VSC8552 devices. It serves as the perfect alternative to the VSC8584 or VSC8582 devices for designs that need the highest 1588v2 PTP accuracy, but may not need MACsec 256-bit/128-bit encryption.
Microchip's complimentary and confidential MicroCHECK design review service, which offers insight from the initial concept to the final PCB layout, is available to customers who are using our products in their projects. You can confidently submit your design materials in a secure and private setting, and our expert engineers will provide individualized feedback to enhance your design. MicroCHECK design review service is subject to Microchip's Program Terms and Conditions and requires a myMicrochip account.
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Fast Dispatch: Ships in 5-7 days(in-stock parts within 1-2 days)
Unishop Global Export: 1-7 days, $40.00
Guaranteed Delivery: Door-to-door in 30 days
Compliant Worldwide Shipping: DHL, FedEx, SF, and UPS.
IMPORTANT NOTICE
Quotations are subject to stock availability and may vary with market conditions. Prices and lead times are not guaranteed until a purchase order is confirmed. Ensure your contact details are correct to avoid delays in response.

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