74HC273N [NXP]

The 74HC273; 74HCT273 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL). It features eight edge-triggered, D-type flip-flops with individual D inputs and Q outputs. The common clock (pin CP) and master reset (pin MR) inputs load and reset all flip-flops simultaneously. The state of each D input, one set-up time before the LOW-to-HIGH clock transition, is transferred to the corresponding output (Qn). All outputs are forced LOW independently of clock or data inputs by a LOW voltage level on the MR input. The device is useful for applications where the true output only is required and the clock and master reset are common to all storage elements. Key features include ideal buffer for MOS microprocessor or memory, common clock and master reset, eight positive edge-triggered D-type flip-flops, compliance with JEDEC standard no. 7A, ESD protection, multiple package options, and specified from -40°C to +125°C.