The STGAP2SiCD is a dual gate driver for SiC MOSFETs which provides galvanic isolation between each gate driving channel and the low voltage control and interface circuitry. The gate driver is characterized by 4 A current capability and rail-to-rail outputs, making it suitable for mid and high power applications such as power conversion and industrial motor drivers inverters. The separated output pins allow to independently optimize turn-on and turn-off by using dedicated gate resistors, while the Miller CLAMP function allows avoiding gate spikes during fast commutations in half-bridge topologies. The device integrates protection functions: dedicated SD and BRAKE pins are available, UVLO and thermal shutdown are included to easily design high reliability systems. In half-bridge topologies the interlocking function prevents outputs from being high at the same time, avoiding shoot-through conditions in case of wrong logic input commands. The interlocking function can be disabled by a dedicated configuration pin, allowing independent and parallel operation of the two channels. The input to output propagation delay results are contained within 75 ns, providing high PWM control accuracy. A standby mode is available in order to reduce idle power consumption.

• High voltage rail up to 1200 V
• Driver current capability: 4 A sink/source @ 25 °C
• dV/dt transient immunity ±100 V/ns
• Overall input-output propagation delay: 75 ns
• Separate sink and source option for easy gate driving configuration
• 4 A Miller CLAMP
• UVLO function
• Configurable interlocking function
• Dedicated SD and BRAKE pins
• Gate driving voltage up to 26 V
• 3.3 V, 5 V TTL/CMOS inputs with hysteresis
• Temperature shutdown protection
• Standby function
• 6 kV galvanic isolation
• Wide Body SO-36W
• UL 1577 recognized