STP9N65M2 [STMicroelectronics]

STP9N65M2 Overview

An op amp's input capacitance is defined as the capacitance between both of its input terminals with either input grounded, and 315pF @ 100V is its maximum input capacitance.The drain current is the maximum continuous current the device can conduct, and this device has 5A continuous drain current (ID).A drainage-to-source breakdown voltage corresponds to the voltage at which a specified value of ID flows, where VGS is 650V, and this device has a drainage-to-source breakdown voltage of 650VV.Input capacitance must be charged before drain current conduction can begin, so the turn-off delay time is 22.5 ns.Before drain current conduction begins, the device's input capacitance must be charged, so the delay time is 7.5 ns.An FET transistor's gate-source voltage, VGS, indicates how much voltage is applied across the transistor's gate-source terminal and it can range from 25V to 1.In this case, the threshold voltage of the transistor is 3V, which means that it will not activate any of its functions when its threshold voltage reaches 3V.Using drive voltage (10V), this device contributes to a reduction in overall power consumption.

STP9N65M2 Features

a continuous drain current (ID) of 5A
a drain-to-source breakdown voltage of 650V voltage
the turn-off delay time is 22.5 ns
a threshold voltage of 3V

STP9N65M2 Applications

There are a lot of STMicroelectronics
STP9N65M2 applications of single MOSFETs transistors.

• AC-DC Power Supply
• Synchronous Rectification for ATX 1 Server I Telecom PSU
• Motor drives and Uninterruptible Power Supplies
• Micro Solar Inverter
• DC/DC converters
• Power Tools
• Motor Drives and Uninterruptible Power Supples
• Synchronous Rectification
• Battery Protection Circuit
• Telecom 1 Sever Power Supplies