STPCC5HEBC [STMicroelectronics]

STPCC5HEBC Description

The STPC Consumer-II integrates a standard 5thgeneration   x86   core,   a   Synchronous   SDRAM controller, a graphics subsystem, a video pipeline, and support logic including  PCI,  ISA,  and  IDEcontrollers to provide a    single consumer-orientated  PC  compatible subsystem on a  single device. The device is based on a tightly coupled UnifiedMemory   Architecture   (UMA),   sharing memory between the CPU, the graphics and the video.

STPCC5HEBC Features

POWERFUL x86 PROCESSOR

64-BIT SDRAM UMA CONTROLLER

VGA & SVGA CRT CONTROLLER

135 MHz RAMDAC

2D GRAPHICS ENGINE

VIDEO INPUT PORT

VIDEO PIPELINE

- UP-SCALER

- VIDEO COLOUR SPACE CONVERTER

- CHROMA & COLOUR KEY SUPPORT

TV OUTPUT

- THREE-LINE FLICKER FILTER

ITU-R 601/656 SCAN CONVERTER

- NTSC / PAL COMPOSITE, RGB, S-VIDEO

PCI MASTER/ SL _AVE / ARBITER

ISA MASTER 1 SL _AVE

OPTIONAL 16-BIT LOCAL BUS INTERFACE

EIDE CONTROLLER

IFC INTERFACE

IPC

- DMA CONTROLLER

- INTERRUPT CONTROLLER

- TIMER / COUNTERS

POWER MANAGEMENT UNIT

JTAG IEEE1149.1