DP83815DVNG [National Semiconductor]

The DP83815 fully implements the V2.2 33 MHz PCI bus interface for host communications with power management support. Packet descriptors and data are transferred via bus-mastering, reducing the burden on the host CPU. The device supports full duplex 10/100 Mb/s transmission and reception with minimum interframe gap. It integrates an enhanced version of the National Semiconductor PCI MAC/BIU and a 3.3V CMOS physical layer interface. Features include VLAN and long frame support, IEEE 802.3x full duplex flow control, flexible Rx packet filtration with single address perfect filter, broadcast, 512-entry multicast/unicast hash table, and deep packet pattern matching for up to 4 unique patterns. Statistics gathering supports RFC 1213 (MIB II), RFC 1398 (Ether-like MIB), and IEEE 802.3 LME. Internal 2 KB Transmit and 2 KB Receive data FIFOs, Serial EEPROM port with auto-load, Flash/PROM interface for remote boot support, and fully integrated IEEE 802.3/802.3u 3.3V CMOS physical layer with 10BASE-T and 100BASE-TX transceivers. Compliant with IEEE 802.3u Auto-Negotiation, Full Duplex support, and features a single 25 MHz reference clock. Available in 144-pin LQFP and 160-pin LBGA packages with low power 3.3V CMOS design.