EP3C25U256I7 [Altera]

Cyclone III device family offers two variants: Cyclone III (lowest power, high functionality with lowest cost) and Cyclone III LS (lowest power FPGAs with security). Densities range from 5K to 200K logic elements (LEs) and 0.5Mbits to 8Mbits of memory with static power consumption under ¼ watt. Features include high memory-to-logic ratios, high I/O count, adjustable I/O slew rates, support for multiple I/O standards, four PLLs per device, remote system upgrade, and dedicated SEU detection. Cyclone III LS adds security features including AES configuration encryption, design separation flow, JTAG port disable, and error detection cycles. The family supports vertical migration within packages and offers pre-built IP cores for memory interfaces (DDR, DDR2, SDRSDRAM, QDRIISRAM) and DSP functions.