EP1K100FC256-3 [Altera]

ACEX 1K programmable logic devices combine LUT-based logic for optimized performance in data-path, register-intensive, mathematical, and DSP designs with embedded array blocks (EABs) for memory functions (RAM, ROM, dual-port RAM, FIFO) and complex logic. Based on reconfigurable CMOS SRAM, they implement gate array megafunctions with high pin counts for system interfaces. The 2.5-V core enables low-cost, high-volume applications like DSL modems and switches. Features include MultiVolt I/O (2.5V/3.3V/5.0V), low power consumption, up to 250 MHz I/O performance, PCI compliance, JTAG boundary-scan, in-circuit reconfigurability (ICR), ClockLock/ClockBoost clock management, and FastTrack Interconnect for predictable routing.