.GENERAL DESCRIPTION
MX25L12835F is 128Mb bits serial Flash memory, which is configured as 16,777,216 x 8 internally. When it is intwo or four l/0 mode, the structure becomes 67,108,864 bits x 2 or 33,554,432 bits x 4. MX25L12835F feature aserial peripheral interface and software protocol allowing operation on a simple 3-wire bus while it is in single /0mode. The three bus signals are a clock input (SCLK), a serial data input (Sl), and a serial data output (S0). Serialaccess to the device is enabled by CS# input.
When it is in two /0 read mode, the Sl pin and SO pin become Sl00 pin and Sl01 pin for address/dummy bits in-put and data output. When it is in four /0 read mode, the Sl pin, SO pin, WP# and RESET# pin (of 8-pin package)become Sl00 pin, Sl01 pin, Sl02 pin and Sl03 pin for address/dummy bits input and data output.
The MX25L12835F MXSMl0* (Serial Multi l/O) provides sequential read operation on whole chip
After program/erase command is issued, auto program/erase algorithms which program/erase and verify the specifed page or sector/block locations wil be executed. Program command is executed on byte basis. or page (256bytes) basis, or word basis. Erase command is executed on sector (4K-byte), block (32K-byte), or block (64K-byte).or whole chip basis.
To provide user with ease of interface, a status register is included to indicate the status of the chip. The status readcommand can be issued to detect completion status of a program or erase operation via WP bit.
Advanced security features enhance the protection and security functions, please refer to the securily features section for more details.
When the device is not in operation and CS# is high, it will remain in standby mode
The MX25L12835F utilizes Macronix's proprietary memory cell, which reliably stores memory contents even after100,000 program and erase cycles.