EP2A25F672C9 [Altera]

The APEX II Programmable Logic Device Family features a high-density architecture with up to 5,250,000 system gates and 67,200 logic elements. It includes enhanced embedded system blocks (ESBs) for memory functions such as FIFO, dual-port RAM, and CAM. The devices support low-power operation with a 1.5-V core voltage and MultiVolt I/O support for 1.5-V, 1.8-V, 2.5-V, and 3.3-V interfaces. They offer flexible clock management with eight general-purpose PLL outputs and advanced interconnect structure with copper interconnect. The devices are supported by the Altera Quartus II development system and feature in-system programmability and reconfiguration.