EP2AGX190FF35C5G [Altera]

The Arria II device family is a cost-optimized, 40-nm FPGA family designed for ease-of-use. It features a low-power, programmable logic engine with Adaptive Logic Modules (ALMs) and eight-input fracturable LUTs. It includes memory logic array blocks (MLABs) for efficient FIFOs, high-performance DSP blocks up to 550MHz, and configurable multipliers (9x9, 12x12, 18x18, 36x36) as well as 18x36 high-precision multipliers. The devices integrate hardened adders, subtractors, accumulators, and summation functions. They support up to 24 full-duplex transceivers with CDR operating from 600Mbps to 6.375Gbps, and dedicated circuitry for protocols including PCIe Gen1/Gen2, Ethernet, RapidIO, CPRI, OBSAI, SDI, and more. The devices offer up to 726 user I/O pins, high-speed LVDS I/O support up to 1.25Gbps, and low power consumption with architectural power reduction techniques. Security features include 256-bit AES programming file encryption. The devices are supported by Altera's Quartus II software and IP solutions.