EPM7064AELC44-10 [Altera]

The MAX7000A family includes high-density, high-performance EEPROM-based programmable logic devices (PLDs) built on the second-generation Multiple Array MatriX (MAX) architecture. These devices operate with a 3.3-V supply voltage and provide 600 to 10,000 usable gates, in-system programmability (ISP) via JTAG interface, pin-to-pin delays as fast as 4.5 ns, and counter speeds up to 227.3 MHz. They feature MultiVolt I/O interface supporting 2.5V, 3.3V, and 5.0V logic levels, programmable power-saving mode, and are available in various packages including PLCC, TQFP, BGA, and FineLine BGA. The devices support hot-socketing, PCI compatibility, and boundary-scan test compliant with IEEE Std. 1149.1.