EPM7064TC44-7YY [INTEL]

The MAX 7000 family is a high-density, high-performance PLD family based on Altera's second-generation MAX architecture. It includes both non-programmable (MAX 7000) and in-system programmable (MAX 7000S) devices. The family offers logic densities from 600 to 5,000 usable gates, with pin-to-pin delays as fast as 5 ns and counter frequencies up to 175.4 MHz. Devices are available in a wide range of packages and support 3.3-V or 5.0-V operation with MultiVolt I/O interface. Enhanced features in MAX7000E and MAX7000S include additional global clocking, output enable controls, and programmable slew-rate control. The devices also feature a programmable power-saving mode, security bit, and are PCI-compliant.