EPM7128BFC100-10 [INTEL]

The MAX 7000B family consists of high-performance, 2.5-V CMOS EEPROM-based programmable logic devices built on second-generation MAX architecture. These devices offer densities from 600 to 10,000 usable gates with 32 to 512 macrocells, featuring pin-to-pin delays as low as 3.5 ns and counter frequencies exceeding 303.0 MHz. They include advanced 2.5-V in-system programmability (ISP) via JTAG interface, MultiVolt I/O interface supporting 3.3-V, 2.5-V, and 1.8-V logic levels, programmable power-saving modes, and support for advanced I/O standards including SSTL-2, SSTL-3, and GTL+. The devices provide programmable interconnect array (PIA) for fast predictable performance, configurable expander product-term distribution, and programmable macrocell registers with independent controls. They are available in various packages including TQFP, PQFP, BGA, FineLine BGA, Ultra FineLine BGA, and PLCC, and are supported by Altera's MAX+PLUS II and Quartus development systems.