S21152BB [INTEL]

The 21152 is a second-generation PCI-to-PCI bridge compliant with PCI Local Bus Specification Revision 2.1 and PCI-to-PCI Bridge Architecture Specification Revision 1.1. It supports delayed transactions for configuration, I/O, and memory reads with bi-directional buffering for simultaneous posted writes and delayed transactions. Features include a programmable 2-level secondary bus arbiter, individual secondary clock software control, enhanced address decoding, and concurrent primary/secondary bus operation for traffic isolation. It provides five secondary clock outputs with low skew and supports both 5V and 3.3V signaling environments.