AT32UC3A1512-AUR [Microchip]

High-performance, low-power 32-bit AVR RISC-based microcontroller combines 512KB flash, 64KB SRAM, 10/100 ethernet MAC, full-speed (12 Mbps) USB 2.0 with embedded host capability, I2S, and a built-in audio D/A converter.

The MCU achieves 91 Dhrystone MIPS (DMIPS) at 66 MHz while consuming only 40 mA at 3.3V.

The Peripheral Direct Memory Access (PDCA) controller transfers data between peripherals and memories without processor involvement, drastically reducing processing with continuous large data streams within the MCU.

• High Performance, Low Power 32-Bit Atmel® AVR® Microcontroller
• Up to 91 DMIPS Running at 66 MHz from Flash (1 Wait-State)
• Up to 49 DMIPS Running at 33MHz from Flash (0 Wait-State)
• Memory Protection Unit (MPU)
• Multi-hierarchy Bus System
• 512K Bytes, 256K Bytes, 128K Bytes Versions, Single Cycle Access up to 33 MHz
• 64K Bytes (512KB and 256KB Flash), 32K Bytes (128KB Flash)
• SDRAM / SRAM Compatible Memory Bus (16-bit Data and 24-bit Address Buses)
• Power and Clock Manager Including Internal RC Clock and One 32KHz Oscillator
• Two Multipurpose Oscillators and Two Phase-Lock-Loop (PLL) allowing Independent CPU Frequency from USB Frequency
• Watchdog Timer, Real-Time Clock Timer
• 5V Input Tolerant I/Os
• Single 3.3V Power Supply or Dual 1.8V-3.3V Power Supply
• 100-pin TQFP (69 GPIO pins), 144-pin LQFP (109 GPIO pins), 144 BGA (109 GPIO pins)
• Industrial (-40° C to +85° C)
• Flexible End-Point Configuration and Management with Dedicated DMA Channels
• On-chip Transceivers Including Pull-Ups
• 802.3 Ethernet Media Access Controller
• Supports Media Independent Interface (MII) and Reduced MII (RMII)
• One Three-Channel 16-bit Timer/Counter (TC)
• One 7-Channel 16-bit Pulse Width Modulation Controller (PWM)
• Independent Baud rate Generator, Support for SPI, IrDA and ISO7816 interfaces
• Support for Hardware Handshaking, RS485 Interfaces and Modem Line
• Two Master/Slave Serial Peripheral Interfaces (SPI) with Chip Select Signals
• Supports I2S and Generic Frame-Based Protocols
• One Master/Slave Two-Wire Interface (TWI), 400kbit/s I2C-compatible
• One 8-channel 10-bit Analog-To-Digital Converter
• Sample Rate Up to 50 KHz
• On-Chip Debug System (JTAG interface)
• Nexus Class 2+, Runtime Control, Non-Intrusive Data and Program Trace