AT60034QC [Atmel]

AT6000 Series FPGAs feature Cache Logic® design for adaptive hardware and hardware acceleration, supporting system speeds >100 MHz with typical operating current of 15-170 mA. The symmetrical array architecture uses small, efficient cells connected by a flexible busing network with independently controlled column clocks and resets. Devices are built on 0.6 µm single-poly double-metal CMOS process and include programmable I/O, multiple configuration options, and automatic component generators for reusable hard macro functions.