PIC18F44Q71-E/P [Microchip]

PIC18-Q71 broadens the PIC18 portfolio for high bandwidth, mixed signal and sensor applications with 2 integrated operational amplifiers, 12-bit differential ADC with Computation and Context Switching, 8/10-bit DACs, high-speed analog comparators, Analog Peripheral Manager and a 8-bit signal routing port to interconnect digital peripherals.  These 28-, 40- and 48-pin devices are also equipped with three 16-bit dual PWMs outputs, four Direct Memory Access channels, eight Configurable Logic Cells (CLCs) and two UARTS. The rich set of Core Independent Peripherals enable simple analog configurations and quick responses to system events in a variety of applications including lighting, motor control, medical, home automation, automotive and Internet of Things (IoT). 

PIC18-Q71 Product Family Overview

Analog Simulations

PIC18-Q71 Developer's Page

Two Operational Amplifiers
• 5.5 MHz Gain Bandwidth
• Programmable Gain using Internal Resistor Ladder
• Built-in hardware peak detect operation

12-bit Differential Analog-to-Digital Converter with Computation and Context Switching:
• Up to 43 external channels
• Differential or single-ended ADC conversion
• Automated math functions on input signals
• Averaging, filter calculations, oversampling and threshold comparison
• Four Separate Contexts (settings and results) saved and accessible separately
• Operates in Sleep
• Five internal analog channels

Hardware Capacitive Voltage Divider (CVD) Support
• Automates touch sampling and reduces software size and CPU usage

One 10-Bit Digital-to-Analog Converters (DAC)

Two 8-Bit Digital-to-Analog Converters (DAC)

Two High-speed Comparators (CMP)

Analog Peripheral Manager
• Can be used to optimize power consumption in applications that use analog peripherals by switching them

8-Bit Signal Routing Port
• Provides internal ports used to interconnect digital peripherals

Two Universal Timers
• Two 16-bit timers can be chained together to create a combined 32-bit timer

Four Direct Memory Access (DMA) Controllers

Three 16-bit dual PWMs provide six PWM outputs

Vectored Interrupt (VI) Capability - Faster interrupt response time
• Selectable high/low priority
• Fixed interrupt latency of three instruction cycles
• Programmable vector table base address
• Backwards compatible with previous interrupt capabilities

Low Power Mode Features
• Sleep: < 1μA typical @ 3V
• Doze: CPU and Peripherals Running at Different Cycle Rates (typically CPU is lower)
• Idle: CPU Halted While Peripherals Operate
• Sleep: Lowest Power Consumption

Peripheral Module Disable (PMD)

Peripheral Pin Select (PPS)
• Enables pin mapping of digital I/O

Communication
• Two UART - One UART supports LIN/DMX/DALI
• SPI/I2C

Programming/Debugging Features
• In-Circuit Serial Programming™ (ICSP™) via Two Pins
• In-Circuit Debug (ICD) with Three Breakpoints via Two Pins
• Debug Integrated On-Chip