Name: LPC2368FET100Z
Brand: NXP
SKU: LPC2368FET100Z

LPC2368FET100Z Description

The LPC2368FET100Z is a microcontroller based on ARM7TDMI-S CPU with real-time emulation that combines the microcontroller with up to 512 kB of

embedded high-speed flash memory.

LPC2368FET100Z Features

ARM7TDMI-S processor, running at up to 72 MHz
Up to 512 kB on-chip flash program memory with In-System Programming (ISP) and In-Application Programming (IAP) capabilities. Flash program memory is on the ARM local bus for high-performance CPU access.
8 kB/32 kB of SRAM on the ARM local bus for high-performance CPU access.
16 kB SRAM for Ethernet interface. It can also be used as a general-purpose SRAM.
8 kB SRAM for general-purpose DMA use is also accessible by USB.
Dual Advanced High-performance Bus (AHB) system that provides for simultaneous Ethernet DMA, USB DMA, and program execution from on-chip flash with no contention between those functions. A bus bridge allows the Ethernet DMA to access the other AHB subsystem.
Advanced Vectored Interrupt Controller (VIC), supporting up to 32 vectored interrupts.
General Purpose DMA controller (GPDMA) on AHB that can be used with the SSP serial interfaces, the I2S port, and the Secure Digital/MultiMediaCard (SD/MMC) card port, as well as for memory-to-memory transfers.
Standard ARM test/debug interface for compatibility with existing tools.
The emulation trace module supports real-time trace.
Single 3.3 V power supply (3.0 V to 3.6 V).
Three reduced power modes: idle, sleep, and power-down.
Four external interrupt inputs are configurable as edge/level sensitive. All pins on PORT0 and PORT2 can be used as edge-sensitive interrupt sources.
Processor wake-up from Power-down mode via any interrupt able to operate during Power-down mode (includes external interrupts, RTC interrupt, USB activity, Ethernet wake-up interrupt).
Two independent power domains allow fine-tuning of power consumption based on needed features.
Each peripheral has its own clock divider for further power saving.
Brownout detects with separate thresholds for interrupt and forced reset.
On-chip power-on reset.
On-chip crystal oscillator with an operating range of 1 MHz to 24 MHz.
4 MHz internal RC oscillator trimmed to 1 % accuracy that can be used as
the system clock optionally. When used as the CPU clock, does not allow CAN and USB to run.

LPC2368FET100Z Applications

Industrial control
Medical systems
Protocol converter
Communications

Key Features

No key features available

Application scenarios

No application scenarios available

LPC2368FET100Z Description

The LPC2368FET100Z is a microcontroller based on ARM7TDMI-S CPU with real-time emulation that combines the microcontroller with up to 512 kB of

embedded high-speed flash memory.

LPC2368FET100Z Features

ARM7TDMI-S processor, running at up to 72 MHz
Up to 512 kB on-chip flash program memory with In-System Programming (ISP) and In-Application Programming (IAP) capabilities. Flash program memory is on the ARM local bus for high-performance CPU access.
8 kB/32 kB of SRAM on the ARM local bus for high-performance CPU access.
16 kB SRAM for Ethernet interface. It can also be used as a general-purpose SRAM.
8 kB SRAM for general-purpose DMA use is also accessible by USB.
Dual Advanced High-performance Bus (AHB) system that provides for simultaneous Ethernet DMA, USB DMA, and program execution from on-chip flash with no contention between those functions. A bus bridge allows the Ethernet DMA to access the other AHB subsystem.
Advanced Vectored Interrupt Controller (VIC), supporting up to 32 vectored interrupts.
General Purpose DMA controller (GPDMA) on AHB that can be used with the SSP serial interfaces, the I2S port, and the Secure Digital/MultiMediaCard (SD/MMC) card port, as well as for memory-to-memory transfers.
Standard ARM test/debug interface for compatibility with existing tools.
The emulation trace module supports real-time trace.
Single 3.3 V power supply (3.0 V to 3.6 V).
Three reduced power modes: idle, sleep, and power-down.
Four external interrupt inputs are configurable as edge/level sensitive. All pins on PORT0 and PORT2 can be used as edge-sensitive interrupt sources.
Processor wake-up from Power-down mode via any interrupt able to operate during Power-down mode (includes external interrupts, RTC interrupt, USB activity, Ethernet wake-up interrupt).
Two independent power domains allow fine-tuning of power consumption based on needed features.
Each peripheral has its own clock divider for further power saving.
Brownout detects with separate thresholds for interrupt and forced reset.
On-chip power-on reset.
On-chip crystal oscillator with an operating range of 1 MHz to 24 MHz.
4 MHz internal RC oscillator trimmed to 1 % accuracy that can be used as
the system clock optionally. When used as the CPU clock, does not allow CAN and USB to run.