The circuit is a high-speed CMOS low voltage quad analog SPDT (single pole dual throw) switch or 2:1 multiplexer/demultiplexer switch developed with silicon gate CMOS technology. It is designed to operate from 1.65 V to 5.5 V, making this device ideal for portable applications.

The nSEL inputs are provided to control the switch. The switch S1 is ON (connected to common port Dn) when the nSEL input is held high, and OFF (a high impedance state exists between the two ports) when SEL is held low. The switch S2 is ON (connected to common port D) when the nSEL input is held low, and OFF (a high impedance state exists between the two ports) when nSEL is held high. Additional key features include: fast switching speed, break-before-make delay time, and ultra-low power consumption. All inputs and outputs are equipped with protection circuits against static discharge, giving them ESD immunity.

• Wide operating voltage range:
  • V_CC (opr) = 1.65 V to 5.5 V single supply
• Low on-resistance:
  • R_on(peak) = 2.75 Ω (T_A = 25 °C) at V_CC = 5 V
• 1.8 V logic compatible
• Fail-safe logic
• Low power dissipation:
  • I_CC = 0.1 µA at T_A = 25 °C
  • I_CC = 25 µA at T_A = 125 °C
• Typical bandwidth (-3 dB) at 500 MHz on all channels
• -40 °C to +125 °C operating temperature
• USB (2.0) high speed (480 Mbps) signal switching compliant