PCB Via Types: Layer Span, Pads and Surface Treatment
PCB Vias Explained by Layer Span, Placement and Surface Treatment
A PCB via is a conductive interlayer connection, usually formed by metallizing a hole through part or all of the board. Choosing a via involves three separate questions: which layers it spans, where it sits in the layout, and how its openings or interior are treated.
Through, blind and buried describe layer span; via-in-pad describes placement; tenting describes a surface treatment. Keeping these categories separate prevents ambiguous fabrication notes and makes routing decisions easier to review.
What a Via Connects
Copper on the hole wall, or a qualified filled structure, provides the conductive path between selected copper features. The surrounding dielectric separates that path from other conductors.
A through via passes physically through every layer position, but it does not necessarily connect electrically to every copper layer. Clearance openings, commonly called antipads, isolate it from layers that should remain unconnected. Connection pads join it to the intended nets.
This distinction matters when inspecting a stackup. A drawing of a hole crossing a plane does not establish whether that plane is connected; the local copper geometry determines the connection.
Vias can carry signals or power, provide ground connections and participate in thermal paths. They are not substitutes for mounting holes or mechanical supports unless a particular construction has been designed for that purpose.
Choose the Required Layer Span
Through vias extend between the two outer surfaces. They are a straightforward option when their routing area and electrical behavior fit the design. However, their pads and clearance regions can occupy space on layers where no connection is needed.
Blind vias run from an outer surface to an internal layer without emerging on the opposite surface. Buried vias connect internal layers and have no opening on either finished outer surface. Their manufacturing sequence must provide access to the relevant layers before they become enclosed.
| Description | Physical span | Main design question |
|---|---|---|
| Through via | Top surface to bottom surface | Can routing accommodate the full-depth structure and any unused barrel? |
| Blind via | An outer surface to an internal layer | Is the proposed layer pair supported by the fabrication sequence? |
| Buried via | Internal layers only | Is the extra internal interconnect structure justified by routing needs? |
Table 1: Layer span describes geometry, not an automatic reliability or cost ranking.
Do not assume that any arbitrary layer pair is available once a fabricator offers blind or buried vias. The supported construction depends on drilling access, lamination sequence and the process used to build the connections.
Figure 1: A through via reaches both surfaces, a blind via reaches one, and a buried via stays within the board. Connections to individual layers depend on pad and clearance design.
Distinguish Microvias and Stacked Structures
Microvias are short, fine interlayer connections associated with HDI constructions and commonly produced by laser processing. Their definition and acceptance should follow the applicable specification and the fabricator's process, not a diameter threshold quoted without depth or construction.
LPKF's drilling guidance describes laser creation of fine vias alongside mechanical drilling. Equipment capability is only one part of the supported finished connection.
Successive microvias can be stacked vertically or staggered laterally. Stacked construction saves routing area but introduces interfaces and process requirements that must be qualified. A drawing of two holes aligned over one another does not explain how the lower via is filled, planarized or prepared for the next connection.
Keep the specification explicit about the layer sequence and structure. Do not use “microvia,” “blind via” and “stacked via” as interchangeable words: one connection can satisfy more than one description, but each description answers a different question.
Define Hole Size, Aspect Ratio and Annular Ring
Via dimensions need a consistent convention. A fabrication drawing should distinguish the tool or drilled diameter from the finished opening after plating. For a tapered microvia, it also matters which diameter is being reported.
Aspect ratio compares hole depth with the specified diameter. For example, a 1.6 mm depth divided by a 0.30 mm reference diameter gives approximately 5.3. This is an illustrative calculation, not a universal approval limit. Confirm the fabricator's convention and supported ratio for the actual process.
Higher aspect ratio makes consistent processing inside the hole more demanding. It does not automatically create a thicker copper lining or a higher current rating. Plating must meet the separately agreed requirements.
For ideal concentric geometry, nominal radial annular ring is half the difference between pad diameter and hole diameter. Production registration and drilling variation reduce the copper available at the narrowest point. The layout must therefore use the fabricator's rules and applicable acceptance criteria, not just an ideal circle calculation.
Current and temperature-rise assessment should consider the actual copper cross-section, length, surrounding copper and thermal environment. Counting vias without reviewing those features is an incomplete power-design check.
Understand Unused Barrel and Return Paths
A signal may enter a through via on one layer and leave on an inner layer. The remaining barrel beyond that connection can form an unused branch, often called a via stub. It is part of the vertical interconnect, not merely an extra trace drawn beside it.
At sufficiently high frequencies, that branch can affect the transition. Blind structures, a different layer assignment or qualified backdrilling may help, depending on the design. Backdrilling removes an unwanted portion while retaining the needed connection and manufacturing margin.
The signal's return path also needs attention when changing layers. Reference-plane continuity, nearby return connections and the geometry of clearances influence the transition. Replacing a through via with a smaller feature does not automatically solve a missing return path.
Evaluate the complete transition at the relevant bandwidth. A via's electrical behavior includes its pads, barrel, clearances and surrounding conductors, so diameter alone is an inadequate signal-integrity model.
Via-in-Pad Requires an Assembly Decision
Via-in-pad places the connection within a component land. It can shorten the route out of a dense footprint or contribute to an exposed-pad thermal path. The location is the defining feature; filling and capping describe additional manufacturing choices.
An open hole can draw solder away from the joint or otherwise disturb assembly. Where a flat solderable pad is needed, the design may call for an appropriate filled and plated-over structure. The chosen process must be specified and reviewed with fabrication and assembly.
Do not assume every filled via uses conductive paste. A plated hole can use nonconductive resin fill with a copper cap, while an HDI microvia may use copper filling. The electrical path and required surface are different questions from the composition of the fill.
Via-in-pad is not inherently restricted to small pads or excluded from high-reliability designs. Its suitability depends on the qualified construction, component land pattern and assembly process. Use the package guidance and the actual board-house capabilities rather than a blanket rule.
Tenting Is Not the Same as Filling
Tenting covers a via opening with solder mask. It can help avoid exposed copper in selected locations, but it does not create a filled, planar solderable surface and should not be treated as a hermetic moisture barrier.
Specify whether treatment applies to one side or both, and confirm the supported opening size and mask process. Plugging, filling and capping are distinct operations. An ambiguous note such as “close all vias” can lead to a board that differs from the assembler's expectations.
Keep solder-mask openings separate from stencil apertures. Mask geometry controls where solder mask remains; paste volume is primarily a stencil and assembly-design matter. One should not be used as a casual substitute for the other.
Review the Complete Connection Before Release
For each via structure, confirm the connected layers, hole convention, pad and clearance dimensions, copper requirements and any fill or surface treatment. Check the intended lamination sequence and the assembly implications of holes in component pads.
Then agree on verification appropriate to the structure and its exposure. A room-temperature continuity result does not establish endurance under every thermal cycle. Inspection and qualification should be matched to the interconnect and application.
Conclusion
Choose PCB vias by separating layer span, placement and treatment. That makes it easier to compare routing options, define manufacturable dimensions and communicate the surface that assembly needs. A complete via specification describes the connection, not just the hole.
Frequently Asked Questions
Q1: Does a through via electrically connect every copper layer?
No. It spans the board, but pads make the intended connections and clearances isolate other layers. The copper artwork determines which nets are joined.
Q2: Is a tented via suitable wherever a filled via is required?
No. Solder mask over an opening does not provide the same internal fill or planar metal surface. Use the construction required by the component pad and assembly process.
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