EP2A25F672C7 [Altera]

The APEX II Programmable Logic Device Family features high-density architecture with up to 5,250,000 system gates and 67,200 logic elements. It includes enhanced embedded system blocks (ESBs) for memory functions such as FIFO, dual-port RAM, and CAM. The devices support high-speed I/O standards including True-LVDS (up to 1 Gbps), LVPECL, PCML, and HyperTransport, as well as flexible LVDS channels. They also feature multi-voltage I/O support (1.5V, 1.8V, 2.5V, 3.3V), low-power operation with 1.5V core, and advanced clock management with PLLs. The devices are configured via byte-wide synchronous configuration and support in-system programmability.