EP2A25F672C8 [Altera]

The APEX II family integrates high-speed differential I/O support using the True-LVDS interface, supporting LVDS, LVPECL, HyperTransport, and PCML I/O standards. It features enhanced embedded system blocks (ESBs) for memory functions, high-density architecture with up to 5,250,000 system gates and 67,200 logic elements, and low-power operation with 1.5-V core voltage and MultiVolt I/O support. The devices also include flexible clock management with eight general-purpose PLL outputs and advanced interconnect structure for high performance.