AX2000-1FG1152I [MICROSEMI]

The Axcelerator family is based on the AX architecture, derived from the SX-A sea-of-modules architecture, designed for high performance and total logic module utilization. It features a patented metal-to-metal antifuse programmable interconnect element, enabling a sea-of-modules architecture with abundant routing resources. The devices offer up to 2 million equivalent system gates, up to 684 I/Os, up to 10,752 dedicated flip-flops, and up to 295 kbits of embedded SRAM/FIFO. Manufactured on an advanced 0.15μm CMOS antifuse process with 7 layers of metal, it provides a single-chip, nonvolatile solution with 100% resource utilization and pin locking. Key features include a 1.5V core voltage for low power, footprint compatible packaging, and flexible multi-standard I/Os supporting 1.5V, 1.8V, 2.5V, and 3.3V mixed voltage operation.