The μ PC835 is the higher version of μPC832 and 4062, the J-FET input operational amplifiers, in stability and accuracy. The μ PC835 is a J-FET input dual operational amplifier which realizes both low power consumption and high stability, by adopting a High-Speed PNP transistor of f_T = 300 MHz on its output stage. In addition, despite its J-FET input, the μ PC835 realizes low offset voltage characteristics that eclipses conventional general operational amplifiers, by using a resistance trimming system, the proven method for our high accuracy operational amplifier and high accuracy reference voltage. The μ PC835 is ideal for use in measurement instruments and control instruments, which especially requires the stability during capacitive load connections.

• Input offset voltage: ±3 mV MAX.
• Slew rate: 5.5 V/μ s TYP.
• Unity gain frequency: 2.8 MHz TYP.
• Low power: I_CC ≤ 2.2 mA MAX. (Reduces circuit currents while maintaining relatively high slew rate and bandwidth)
• High stability is secured to capacitive loads (4000 pF, A_V = +1)
• Internal frequency compensation
• Small package The whole size of the package is downsized by 30 to 40% compared with a standard SOP contour, by using a TSSOP (3 x 3 mm² body) package