M95P32-IXCST/EF [STMicroelectronics]

The M95P32-I and M95P32-E are manufactured with ST's advanced proprietary NVM technology. They offer byte flexibility, page alterability, high page cycling performance, and ultralow power consumption, equivalent to that of EEPROM technology.

The devices are a 32-Mbit SPI page EEPROM, organized as 8192 programmable pages of 512 bytes each, accessed through an SPI bus with high-performance dual- and quad-SPI outputs.

The devices offer two additional (identification) 512-byte pages:

Additional status, configuration, and volatile registers set the desired device configuration, while the safety register provides information on the device status.

The M95P32-I operates with a supply voltage from 1.6 to 3.6 V over an ambient temperature range of -40 °C to +85 °C. The M95P32-E offers an extended range of temperature of -40 °C to +105 °C. The device supports a clock frequency of up to 80 MHz.

The M95P32-I and M95P32-E offer byte and page write instructions of up to 512 bytes. Write instructions consist in self-timed auto erase and program operations, resulting in flexible data byte management.

The devices also accept page, block, sector, and chip erase commands to set the memory to an erased state.

The memory can then be fast-programmed by 512-byte pages, and further optimized using the page program with buffer load instruction to hide the SPI communication latency.

• Interface
  • Supports serial peripheral interface (SPI) and dual/quad outputs
• High speed frequency
  • Clock frequency up to 80 MHz
  • Fast read single/dual/quad output with one dummy byte
    • Dual output data transfer up to 160 Mbits/s
    • Quad output data transfer up to 320 Mbits/s
• Memory
  • 32 Mbits of page EEPROM
  • 64-Kbyte blocks, 4-Kbyte sectors
  • Page size: 512-byte
  • Two additional 512-byte identification pages
• Supply voltage
• Temperature
  • Operating temperature range:
    • -40 °C to +85 °C (industrial)
    • -40 °C to +105 °C (extended)
• Performance
  • Write endurance: 500 kcycles on full temperature range
  • Data retention:
    • 100 years
    • 10 years after 500 kcycles
• Ultra-low power consumption
  • 0.6 μA (typical) in deep power-down mode
  • 16 μA (typical) in standby mode
  • 800 μA (typical) for read single at 10 MHz
  • 1.5 mA (typical) for page write
  • Current peak control < 3 mA
• High write erase performance
  • Fast Write, program, and erase times:
    • 2 ms (typical) for byte and page write (includes auto erase and program) for 512 bytes
    • 1.2 ms (typical) for page program (512 bytes)
    • 1.1 ms (typical) for page erase
    • 1.3 ms (typical) for sector erase
    • 4 ms (typical) for block erase
    • 15 ms (typical) for chip erase
  • Page program with buffer load
• Advanced features
  • ECC for high memory reliability (DEC, TED)
  • Schmitt trigger inputs for noise filtering
  • Output buffer programmable strength
  • Operating status flags for ISO26262
  • Software reset
  • Write protection by block, with top/bottom option
  • Unique ID upon request
  • Electronic identification
  • Supports SFDP (serial flash discoverable parameters) mode
  • JEDEC standard manufacturer identification
• Package
  • DFN8, SO8N, and WLCSP8 (ECOPACK2-compliant)
  • Unsawn wafer
• ESD protection
  • HBM (human body model): 2000 V