The HV7358 is a 16-channel, 3-level high voltage ultrasound transmitter with built-in programmable beamformer. Each channel can generate pulses up to ±80V with a T/R switch and an active discharge back to 0V circuit. The output current can be programmed for 0.3A, 0.5A, 1.0A and 1.6A. 

The integrated transmit beamformer provides as fine as 5ns resolution for beamforming delays. The delay clock for beamformer is generated by a built-in low-phase-noise PLL. The HV7358 stores up to 4 sets of transmit patterns with a maximum of 256 pulses for each pattern. Alternatively, the device also allows to program PWM duty cycle for each individual channel.

The beamformer has an 8-bit divide-by-N counter to generate the CW frequency from the input clock to support continuous wave Doppler operation. Once the CW frequency and the channel delays are programmed, the CW transmission starts when the trigger signal is asserted.

200MHz SPI over differential lines provides the programming interface for the beamformer and pattern generator. The rest of the parameters are programmed through I2C. The built-in beamformer and the daisy-chainable fast SPI interface greatly reduce the number of required connections to FPGA.

The rich features of HV7358 make it particularly suitable for portable/ultraportable ultrasound imaging devices.

For datasheet, demo board and further information, please contact local Microchip sales office.

• 16 channel with active return to true-zero
• Up to ±80V output voltage & ±1.6A output current
• Programmable output current: 0.3, 0.6, 1.2 & 1.6A
• Output ultrasound frequency up to 30MHz
• -40dB Second Harmonic at 5MHz, ±70V, 5-Cycle
• Built-in T/R switch, damper diodes
• Built-in linear regulators for floating gate driver
• Internal low jitter PLL clock multiplier for Tx beamformer and Tx clock
• 30 to 80MHz LVDS input-clock frequencies in PLL mode.
• 30 to 240MHz LVDS input-clock frequencies in non-PLL mode
• PLL frequency integer multiplier 1, 2, 3, 4, 5, 6 & 8.
• Build-in transmit beamformer that allows 5ns delay resolution.
• Guarantee synchronize internal transmit clock across devices to be in same phase
• PLL circuit can be bypassed and shut down to reduce the power consumption
• Store up to four Tx patterns with the optional local tOFF counter allows for Tx apodization use PWM
• Tx patterns up to 256 pulses with programmable pulse width and frequency
• High speed LVDS SPI typ 200MHz operation allows for fast device programming
• SPI group broadcast mode for fast data writing,
• Two-Wire I2C Interface for control and status reading
• Package: 13mmx13mm TFBGA with 0.8mm pitch